View VN7003AHTR_8701837.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

november 2016 docid029238 rev 4 1 / 37 this is information on a product in full production. www.st.com vn7003ah high - side driver with currentsense analog feedback for automotive applications datasheet - production data features max transient supply voltage v cc 40 v operating voltage range v cc 4 to 28 v typ. on - state resistance (per ch) r on 3.5 m current limitation (typ) i limh 135 a stand - by current (max) i stby 0.5 a minimum cranking supply voltage (v cc decreasing) v usd_cranking 3 v ? aec - q100 qualified ? extreme low voltage operation for deep cold cranking applications (compliant with lv124, revision 2013) ? general ? single channel smart high - side driver with currentsense analog feedback ? very low standby current ? compatible with 3 v and 5 v cmos outputs ? diagnostic functions ? overload and short to groun d (power limitation) indication ? thermal shutdown indication ? off - state open - load detection ? output short to v cc detection ? sense enable/ disable ? protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? loss of ground and loss of v cc ? reverse battery ? electrostatic discharge protection applications specially intended for automotive smart powe r distribution, glow plugs, heating systems, dc motors, relay replacement and high power resistive and inductive actuators. description the device is a single channel high - side driver manufactured using st proprietary vipower ? technology and housed in the octapak package. the device is designed to drive 12 v automotive grounded loads through a 3 v and 5 v cmos - compatible interface, providing protection and diagnostics. the devic e integrates advanced protective functions such as load current limitation, overload active management by power limitation and overtemperature shutdown. a sense enable pin allows off - state diagnosis to be disabled during the module low - power mode as well a s external sense resistor sharing among similar devices. table 1: device summary package order codes tape and reel octapak VN7003AHTR
contents vn7003ah 2 / 37 docid029238 rev 4 contents 1 block diagram and pin description ................................ ................ 5 2 electrical specification ................................ ................................ .... 7 2.1 absolute maximum ratings ................................ ................................ 7 2.2 thermal data ................................ ................................ ..................... 8 2.3 electrical characteristics ................................ ................................ .... 8 2.4 electrical characteristics curves ................................ ...................... 16 3 protections ................................ ................................ ..................... 20 3.1 power limitation ................................ ................................ ............... 20 3.2 thermal shutdown ................................ ................................ ........... 20 3.3 current limitation ................................ ................................ ............. 20 3.4 negative voltage clamp ................................ ................................ ... 20 4 application information ................................ ................................ 21 4.1 protection against reverse battery ................................ ................... 21 4.2 immunity against transient electrical disturbances .......................... 22 4.3 mcu i/os protection ................................ ................................ ........ 22 4.4 cs - analog current sense ................................ .............................. 23 4.4.1 principle of currentsense signal generation ................................ .... 24 4.4.2 short to vcc and off - state open - load detection ........................... 26 5 maximum demagnetization energy (vcc = 16 v) ........................ 28 6 package and pcb thermal data ................................ .................... 29 6.1 octapak thermal data ................................ ................................ ...... 29 7 package information ................................ ................................ ..... 32 7.1 octapak package information ................................ .......................... 32 7.2 octapak packing information ................................ ........................... 33 7.3 octapak marking information ................................ .......................... 35 8 revision history ................................ ................................ ............ 36
vn7003ah list of tables docid029238 rev 4 3 / 37 list of tables table 1: device summary ................................ ................................ ................................ ........................... 1 t able 2: pin functions ................................ ................................ ................................ ................................ . 5 table 3: suggested connections for unused and not connected pins ................................ ........................ 6 table 4: absolute maximum ratings ................................ ................................ ................................ ........... 7 table 5: thermal data ................................ ................................ ................................ ................................ . 8 table 6: electrical characteristics during cranking ................................ ................................ ..................... 8 table 7: power section ................................ ................................ ................................ ............................... 9 table 8: switching ................................ ................................ ................................ ................................ ..... 10 table 9: logic inputs ................................ ................................ ................................ ................................ . 10 table 10: protection ................................ ................................ ................................ ................................ .. 11 table 11: currentsense ................................ ................................ ................................ ............................ 11 table 12: truth table ................................ ................................ ................................ ................................ . 15 table 13: iso 7637 - 2 - electrical transient conduction along supply line ................................ ................. 22 table 14: currentsense pin levels in off - state ................................ ................................ .......................... 26 table 15: pcb properties ................................ ................................ ................................ ......................... 29 table 16: thermal parameters ................................ ................................ ................................ ................. 31 table 17: octapak mechanical data ................................ ................................ ................................ ......... 32 table 18: reel dime nsions ................................ ................................ ................................ ....................... 34 table 19: document revision history ................................ ................................ ................................ ........ 36
list of figures vn7003ah 4 / 37 docid029238 rev 4 list of figures figure 1: block diagram ................................ ................................ ................................ .............................. 5 figure 2: configuration diagram (top view) ................................ ................................ ................................ . 6 figure 3: c urrent and voltage conventions ................................ ................................ ................................ . 7 figure 4: iout/isense versus iout ................................ ................................ ................................ ....... 13 figure 5: current sense precision vs. iout ................................ ................................ ............................. 14 figure 6 : switching times and pulse skew ................................ ................................ ............................... 14 figure 7: tdstkon ................................ ................................ ................................ ................................ ... 15 figure 8: off - state output current ................................ ................................ ................................ ........... 16 figure 9: standby current ................................ ................................ ................................ ......................... 16 figure 10: ignd(on) vs. iout ................................ ................................ ................................ ................... 16 figure 11: logic input high level voltage ................................ ................................ ................................ .. 16 figure 12: logic input low level voltage ................................ ................................ ................................ .... 16 figure 13: high level logic input current ................................ ................................ ................................ ... 16 figure 14: low level logic input current ................................ ................................ ................................ .... 17 figure 15 : logic input hysteresis voltage ................................ ................................ ................................ . 17 figure 16: undervoltage shutdown ................................ ................................ ................................ ........... 17 figure 17: on - state resistance vs. tcase ................................ ................................ ................................ . 17 figure 18: on - sta te resistance vs. vcc ................................ ................................ ................................ ... 17 figure 19: turn - on voltage slope ................................ ................................ ................................ .............. 17 figure 20: turn - off voltage slope ................................ ................................ ................................ .............. 18 figure 21: won vs. tcase ................................ ................................ ................................ ......................... 18 figure 22: woff vs. tcase ................................ ................................ ................................ ......................... 18 figure 23: ilimh vs. tcase ................................ ................................ ................................ ....................... 18 figure 24: turn - off output voltage clamp ................................ ................................ ................................ .. 18 figure 25: off - state open - load voltage detection threshold ................................ ................................ ... 18 figure 26: vs clamp vs. tcase ................................ ................................ ................................ ................. 19 figure 27: vsenseh vs. tcase ................................ ................................ ................................ .................. 19 figure 28: application diagram ................................ ................................ ................................ ................. 21 figure 29: simplified internal structure ................................ ................................ ................................ ..... 21 figure 30: currentsense and diagnostic C block diagram ................................ ................................ ........ 23 figure 31: currentsense block diagram ................................ ................................ ................................ ... 24 figure 32: analogue hsd C open - load detection in off - state ................................ ................................ ... 25 figure 33: open - load / short to vcc condition ................................ ................................ ......................... 26 figure 34: maximum turn off current versus inductance ................................ ................................ .......... 28 figure 35: octapak on two - layers pcb (2s0p to jedec jesd 51 - 5) ................................ ...................... 29 figure 36: octapak on four - layers pcb (2s2p to jedec jesd 51 - 7) ................................ ..................... 29 figure 37: rthj - amb vs pcb copper area in open box free air conditions ................................ ............... 30 figure 38: octapak thermal impedance junction ambient single pulse ................................ .................... 30 figure 39: thermal fitting model for octapak ................................ ................................ ........................... 31 figure 40: octapak package dimensions ................................ ................................ ................................ . 32 figure 41: octapack reel 13" ................................ ................................ ................................ .................... 33 figure 42: octapak carrier tape ................................ ................................ ................................ ................ 34 figure 43: octapak schematic drawing of leader and trailer tape ................................ ............................ 35 figure 44: octapak marking information ................................ ................................ ................................ ... 35
vn7003ah block diagram and pin description docid029238 rev 4 5 / 37 1 block diagram and pin description figure 1 : block diagram table 2: pin functions name function v cc battery connection. output power outputs. all the pins must be connected together. gnd ground connection. input voltage controlled input pin with hysteresis. compatible with 3 v and 5 v cmos outputs. it controls output switch state. cs analog current sense output pin delivers a current proportional to the load current. sen active high compatible with 3 v and 5 v cmos outputs pin; it enables the currentsense diagnostic pin. v cc control & diagnostic logic driver current limitation power clamp off state open load over temperature undervoltage v senseh current sense overload protection ( active power limi ta tion ) in cs sen gnd ou t signal clamp reverse battery protection
block diagram and pin description vn7003ah 6 / 37 docid029238 rev 4 figure 2 : configuration diagram (top view) table 3: suggested connections for unused and not connected pins connection / pin currentsense n.c. output input sen floating not allowed x (1) x x x to ground through 1 k resistor x not allowed through 15 k resistor through 15 k resistor notes: (1) x: do not care.
vn7003ah electrical specification docid029238 rev 4 7 / 37 2 electrical specification figure 3 : current and voltage conventions v f = v out - v cc when v out > v cc and input = low 2.1 absolute maximum ratings stressing the device above the rating listed in table 4: "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to the con ditions in table below for extended periods may affect device reliability. table 4: absolute maximum ratings symbol parameter value unit v cc dc supply voltage 38 v v ccpk maximum transient supply voltage (iso7637 - 2:2004 pulse 5b level iv clamped to 40 v; r l = 4) 40 - v cc reverse dc supply voltage 16 - i gnd dc reverse ground pin current 200 ma i out output dc output current internally limited a - i out reverse dc output current 38 i in input dc input current - 1 to 10 ma i sen sen dc input current i sense cs pin dc output current (v gnd = v cc and v sense < 0 v) 10 ma cs pin dc output current in reverse (v cc < 0 v) - 20 e max maximum switching energy (single pulse) t demag = 0.4 ms; t jstart = 150c tbd mj
electrical specification vn7003ah 8 / 37 docid029238 rev 4 symbol parameter value unit v esd electrostatic discharge (jedec 22a - 114f) ? input ? currentsense ? sen ? output ? v cc 4000 2000 4000 4000 4000 v v v v v v esd charge device model (cdm - aec - q100 - 011) 750 v t j junction operating temperature - 40 to 150 c t stg storage temperature - 55 to 150 2.2 thermal data table 5: thermal data symbol parameter typ. value unit r thj - board thermal resistance junction - board (1) 2.1 c/w r thj - amb thermal resistance junction - ambient (jedec jesd 51 - 5) (2) 57.9 r thj - amb thermal resistance junction - ambient (jedec jesd 51 - 7) (1) 15.4 notes: (1) device mounted on four - layers 2s2p pcb (2) device mounted on two - layers 2s0p pcb with 2 cm 2 heatsink copper trace 2.3 electrical characteristics 7 v < v cc < 28 v; - 40c < t j < 150c, unless otherwise spec ified. all typical values refer to v cc = 13 v; t j = 25 c, unless otherwise specified. table 6: electrical characteristics during cranking symbol parameter test conditions min. typ. max. unit v usd_cranking minimum cranking supply voltage (v cc decreasing) 3 v r on on - state resistance i out = 4 a; v cc = 3 v; v cc decreasing 15 m t tsd (1) shutdown temperature (v cc decreasing) v cc = 3 v 140 c notes: (1) parameter guaranteed by design and characterization; not subject to production test.
vn7003ah electrical specification docid029238 rev 4 9 / 37 table 7: power section symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 4 13 28 v v usd undervoltage shutdown 3 v v usdreset undervoltage shutdown reset 5 v v usdhyst undervoltage shutdown hysteresis 0.3 v r on on - state resistance i out = 15 a; t j = 25c 3.5 m i out = 15 a; t j = 150c 7 i out = 15 a; v cc = 4 v; t j = 25c 5.25 r on_rev r dson in reverse battery condition v cc = - 13 v; i out = - 15 a; t j = 25c 3.5 m v clamp clamp voltage i s = 20 ma; t j = - 40c 38 v i s = 20 ma; 25c < t j < 150c 41 46 52 i stby supply current in standby at v cc = 13 v (1) v cc = 13 v; v in = v out = v sen = 0 v; t j = 25c 0.5 a v cc = 13 v; v in = v out = v sen = 0 v; t j = 85c (2) 1.4 a v cc = 13 v; v in = v out = v sen = 0 v; t j = 125c 11 a t d_stby standby mode blanking time v cc = 13 v; v in = 5 v; v sen = 0 v; i out = 0 a 60 300 550 s i s(on) supply current v cc = 13 v; v sen = 0 v; v in = 5 v; i out = 0 a 4 6.5 ma i gnd(on) control stage current consumption in on - state. all channels active. v cc = 13 v; v sen = 5 v; v in = 5 v; i out = 15 a 9 ma i l(off) off - state output current at v cc = 13 v v in = v out = 0 v; v cc = 13 v; t j = 25c 0 0.01 0.5 a v in = v out = 0 v; v cc = 13 v; t j = 125c 0 11 v f output - v cc diode voltage i out = - 15 a; t j = 150c 0.7 v notes: (1) powermos leakage included. (2) parameter specified by design; not subject to production test.
electrical specification vn7003ah 10 / 37 docid029238 rev 4 table 8: switching v cc = 13 v; - 40 oc < t j < 150 c, unless otherwise specified symbol parameter test conditions min. typ. max. unit t d(on) (1) turn - on delay time at t j = 25 c r l = 0.87 10 50 120 s t d(off) (1) turn - off delay time at t j = 25 c 10 60 100 (dv out /dt) on (1) turn - on voltage slope at t j = 25 c r l = 0.87 0.075 0.28 0.7 v/s (dv out /dt) off (1) turn - off voltage slope at t j = 25 c 0.075 0.33 0.7 w on switching energy losses at turn - on (t won ) r l = 0.87 1.8 3.6 (2) mj w off switching energy losses at turn - off (t woff ) r l = 0.87 2 3.6 (2) mj t skew (1) differential pulse skew (t phl - t plh ) r l = 0.87 - 50 0 50 s notes: (1) see figure 6: "switching times and pulse skew" (2) parameter guaranteed by design and characterization; not subject to production test. table 9: logic inputs 7 v < v cc < 28 v; - 40 c < t j < 150 c symbol parameter test conditions min. typ. max. unit input characteristics v il input low level voltage 0.9 v i il low level input current v in = 0.9 v 1 a v ih input high level voltage 2.1 v i ih high level input current v in = 2.1 v 10 a v i(hyst) input hysteresis voltage 0.2 v v icl input clamp voltage i in = 1 ma 5.3 7.5 v i in = - 1 ma - 0.7 sen characteristics (7 v < v cc < 18 v) v senl input low level voltage 0.9 v i senl low level input current v in = 0.9 v 1 a v senh input high level voltage 2.1 v i senh high level input current v in = 2.1 v 10 a v sen(hyst) input hysteresis voltage 0.2 v v sencl input clamp voltage i in = 1 ma 5.3 7.5 v i in = - 1 ma - 0.7
vn7003ah electrical specification docid029238 rev 4 11 / 37 table 10: protection 7 v < v cc < 18 v; - 40 c < t j < 150 c symbol parameter test conditions min. typ. max. unit i limh (1) dc short circuit current v cc = 13 v 80 135 175 a 4 v < v cc < 18 v (2) 175 i liml short circuit current during thermal cycling v cc = 13 v; t r < t j < t tsd 38 t tsd shutdown temperature 150 175 200 c t r reset temperature (2) t rs + 1 t rs + 7 c t rs thermal reset of fault diagnostic indication v sen = 5 v 135 c t hyst thermal hysteresis (t tsd - t r ) (2) 7 c t j_sd dynamic temperature v cc = 13 v 60 k v demag turn - off output voltage clamp i out = 2 a; l = 6 mh; t j = - 40c v cc - 38 v i out = 2 a; l = 6 mh; t j = 25c to 150c v cc - 41 v cc - 46 v cc - 52 v notes: (1) parameter guaranteed by an indirect test sequence. (2) parameter guaranteed by design and characterization; not subject to production test. table 11: currentsense 7 v < v cc < 18 v; - 40 c < t j < 150 c symbol parameter test conditions min. typ. max. unit v sense_cl currentsense clamp voltage v sen = 0 v; i sense = 1 ma - 17 - 12 v v sen = 0 v; i sense = - 1 ma 7 v current sense characteristics k ol (1) i out /i sense i out = 200 ma; v sense = 0.5 v; v sen = 5 v 8350 16800 25150 k 0 i out /i sense i out = 1 a; v sense = 0.5 v; v sen = 5 v 9000 16650 24500 dk 0 /k 0 (2) (3) current sense ratio drift i out = 1 a; v sense = 0.5 v; v sen = 5 v - 30 30 % k 1 i out /i sense i out = 10 a; v sense = 4 v; v sen = 5 v 13150 16450 19750 dk 1 /k 1 (2) (3) current sense ratio drift i out = 10 a; v sense = 4 v; v sen = 5 v - 10 10 % k 2 i out /i sense i out = 15 a; v sense = 4 v; v sen = 5 v 14200 16450 19100 dk 2 /k 2 (2) (3) current sense ratio drift i out = 15 a; v sense = 4 v; v sen = 5 v - 7 7 %
electrical specification vn7003ah 12 / 37 docid029238 rev 4 7 v < v cc < 18 v; - 40 c < t j < 150 c symbol parameter test conditions min. typ. max. unit k 3 i out /i sense i out = 45 a; v sense = 4 v; v sen = 5 v 14760 16450 18670 dk 3 /k 3 (2) (3) current sense ratio drift i out = 45 a; v sense = 4 v; v sen = 5 v - 5 5 % i sense0 currentsense leakage current currentsense disabled: v sen = 0 v; 0 0.5 a currentsense disabled; - 1 v < v sense < 5 v (3) - 0.5 0.5 a currentsense enabled: v sen = 5 v; v in = 5 v; i out = 0 a; 0 5 a v out_csd (3) output voltage for currentsense shutdown v sen = 5 v; r sense = 2.7 k; v in = 5 v; i out = 15 a 5 v v sense_sat currentsense saturation voltage v cc = 7 v; r sense = 10 k; v sen = 5 v; v in = 5 v; i out = 15 a; t j = - 40c 5 v i sense_sat (3) cs saturation current v cc = 7 v; v sense = 4 v; v in = 5 v; v sen = 5 v; t j = - 40c 4 ma i out_sat (3) output saturation current v cc = 7 v; v sense = 4 v; v in = 5 v; v sen = 5 v; t j = - 40c 75 a off - state diagnostic v ol off - state open - load voltage detection threshold v in = 0 v; v sen = 5 v; 2 3 4 v i l(off2) off - state output sink current v in = 0 v; v out = v ol ; t j = - 40c to 125c - 100 - 15 a t dstkon off - state diagnostic delay time from falling edge of input (see figure 7: " tdstkon" ) v in = 5 v to 0 v; v sen = 5 v; i out = 0 a; v out = 4 v 100 350 700 s t d_ol_v settling time for valid off - state open load diagnostic indication from rising edge of sen v in = 0 v; v out = 4 v; v sen = 0 v to 5 v 60 s t d_vol off - state diagnostic delay time from rising edge of v out v in = 0 v; v sen = 5 v; v out = 0 v to 4 v 5 30 s fault diagnostic feedback (see table 12: "truth table" ) v senseh currentsense output voltage in fault condition v cc = 13 v; v in = 0 v; v sen = 5 v; i out = 0 a; v out = 4 v; r sense = 1 k 5 6.6 v i senseh currentsense output current in fault condition v cc = 13 v; v sense = 5 v 7 20 30 ma
vn7003ah electrical specification docid029238 rev 4 13 / 37 7 v < v cc < 18 v; - 40 c < t j < 150 c symbol parameter test conditions min. typ. max. unit currentsense timings (current sense mode) (4) t dsense1h current sense settling time from rising edge of sen v in = 5 v; v sen = 0 v to 5 v; r sense = 1 k; r l = 0.87 60 s t dsense1l current sense disable delay time from falling edge of sen v in = 5 v; v sen = 5 v to 0 v; r sense = 1 k; r l = 0.87 5 20 s t dsense2h current sense settling time from rising edge of input v in = 0 v to 5 v; v sen = 5 v; r sense = 1 k; r l = 0.87 100 380 s t dsense2h current sense settling time from rising edge of i out (dynamic response to a step change of i out ) v in = 5 v; v sen = 5 v; r sense = 1 k; i sense = 90% of i sensemax ; r l = 0.87 200 s t dsense2l current sense turn - off delay time from falling edge of input v in = 5 v to 0 v; v sen = 5 v; r sense = 1 k; r l = 0.87 50 250 s notes: (1) digital filtering is applied for testing (2) all values refer to v cc = 13 v; t j = 25c, unless otherwise specified. (3) parameter guaranteed by design and characterization; not subject to production test. (4) transition delay are measured up to 10% of final conditions. figure 4 : iout/isense versus iout
electrical specification vn7003ah 14 / 37 docid029238 rev 4 figure 5 : current sense precision vs. iout figure 6 : switching times and pulse skew
vn7003ah electrical specification docid029238 rev 4 15 / 37 figure 7 : tdstkon table 12: truth table mode conditions in x sen out x current sense comments stand by all logic inputs low l l l hi - z low quiescent current consumption normal nominal load connected; t j < 150c l h l 0 h l h hi - z h h h i sense = 1/k * i out overload overload or short to gnd causing: t j > t tsd or t j > t j_sd h l h hi - z output cycles with temperature hysteresis h h h v senseh under - voltage v cc < v usd (falling) x x l l hi - z hi - z re - start when v cc > v usd + v usdhyst (rising) off - state diagnostics short to v cc l h h v senseh open - load l h h external pull - up negative output voltage inductive loads turn - off l x < 0 v 0
electrical specification vn7003ah 16 / 37 docid029238 rev 4 2.4 electrical characteristics curves figure 8 : off - state output current figure 9 : standby current figure 10 : ignd(on) vs. iout figure 11 : logic input high level voltage figure 12 : logic input low level voltage figure 13 : high level logic input current
vn7003ah electrical specification docid029238 rev 4 17 / 37 figure 14 : low level logic input current figure 15 : logic input hysteresis voltage figure 16 : undervoltage shutdown figure 17 : on - state resistance vs. tcase figure 18 : on - state resistance vs. vcc figure 19 : turn - on voltage slope
electrical specification vn7003ah 18 / 37 docid029238 rev 4 figure 20 : turn - off voltage slope figure 21 : won vs. tcase figure 22 : woff vs. tcase figure 23 : ilimh vs. tcase figure 24 : turn - off output voltage clamp figure 25 : off - state open - load voltage detection threshold
vn7003ah electrical specification docid029238 rev 4 19 / 37 figure 26 : vs clamp vs. tcase figure 27 : vsenseh vs. tcase
protections vn7003ah 20 / 37 docid029238 rev 4 3 protections 3.1 power limitation the basic working principle of this prote ction consists of an indirect measurement of the junction temperature swing t j through the direct measurement of the spatial temperature gradient on the device surface in order to automatically shut off the output mosfet as soon as t j exceeds the safety level of t j_sd . the protection prevents fast thermal transient effects and, consequently, reduces thermo - mechanical fatigue. 3.2 thermal shutdown in case the junction temperature of the device exceeds the maximum allowed threshold (typically 175c), it automatically switches off and the diagnostic indication is triggered. the device switches on again as soon as its junction temperature drops to t r . 3.3 current limitation the device is equipped with an output current limiter in order to protect the silicon as well as the other components of the system (e.g. bonding wires, wiring harness , connectors, loads, etc.) from excessive current flow. consequently, in case of short circuit, overload or during load power - up, the output current is clamped to a safety level, i limh , by operating the output power mosfet in the active region. 3.4 negative vo ltage clamp in case the device drives inductive load, the output voltage reaches negative value during turn off. a negative voltage clamp structure limits the ma ximum negative voltage to a certain value, v demag , allowing the inductor energy to be dissipated without damaging the device.
vn7003ah application information docid029238 rev 4 21 / 37 4 application information figure 28 : application diagram 4.1 protection against reverse battery figure 29 : simplified internal structure
application information vn7003ah 22 / 37 docid029238 rev 4 the device does not need any external components to protect the internal logic in case of a reverse battery condition. the protection is provided by internal structures. in addition, due to the fact that the output mosfet turns on even in reverse battery m ode, thus providing the same low ohmic path as in regular operating conditions, no additional power dissipation has to be considered. 4.2 immunity against transient electrical disturbances the immunity of the device against transient electrical emissions, conducted along the supply lines and injected into the v cc pin, is tested in accordance with iso7637 - 2:2011 (e) and iso 16750 - 2:2010. the related function performance status classification is shown in table 13: "iso 7637 - 2 - electrical transient conduction along supply line" . test pulses are applied directly to dut (device under test) both in on and off - stat e and in accordance to iso 7637 - 2:2011(e), chapter 4. the dut is intended as the present device only, without components and accessed through v cc and gnd terminals. status ii is defined in iso 7637 - 1 function performance status classification (fpsc) as follows: the function does not perform as designed during the test but returns automatically to normal operation after the test. table 13: iso 7637 - 2 - electrical transient conduction along supply line test pulse 2011(e) test pulse severity level with status ii functional performance status minimum number of pulses or test time burst cycle / pulse repetition time pulse duration and pulse generator internal impedance level u s (1) min max 1 iii - 112v 500 pulses 0,5 s 2ms, 10 2a iii +55v 500 pulses 0,2 s 5 s 50s, 2 3a iv - 220v 1h 90 ms 100 ms 0.1s, 50 3b iv +150v 1h 90 ms 100 ms 0.1s, 50 4 (2) iv - 7v 1 pulse 100ms, 0.01 load dump according to iso 16750 - 2:2010 test b (3) 40v 5 pulse 1 min 400ms, 2 notes: (1) u s is the peak amplitude as defined for each test pulse in iso 7637 - 2:2011(e), chapter 5.6. (2) test pulse from iso 7637 - 2:2004(e). (3) with 40 v external suppressor referred to ground ( - 40c < t j < 150c). 4.3 mcu i/os protection if a ground protection network is used and negative transients are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line both to prevent the microcontroller i/o pins from latch - up and to protect the hsd inputs. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch - up limit of microcontroller i/os.
vn7003ah applicati on information docid029238 rev 4 23 / 37 equation v ccpeak /i latchup r prot (v ohc - v ih - v gnd ) / i ihmax calculation example: for v ccpeak = - 150 v; i latchup 20ma; v ohc 4.5v 7.5 k r prot 140 k. recommended values: r prot = 15 k 4.4 cs - analog current sense diagnostic information on device and load status are provided by an analog output pin (cs) delivering the following signal: ? current monitor: current minitor of channel output current figure 30 : currentsense and diagnostic C block diagram
application information vn7003ah 24 / 37 docid029238 rev 4 4.4.1 principle of currentsense signal generation figure 31 : currentsense block diagram current sense this output is capable of providing: ? current mirror proportional to the load current in normal operation, delivering current proportional to the load according to known ratio named k ? diagnostics flag in fault conditions delivering fixed voltage v senseh the current delivered by the current sense circuit, i sense , can be easily conver ted to a voltage v sense by using an external sense resistor, r sense , allowing continuous load monitoring and abnormal condition detection. normal operation (channel on, no fault, sen active) while device is operating in normal conditions (no fault interven tion), v sense calculation can be done using simple equations current provided by currentsense output: i sense = i out /k voltage on r sense : v sense = r sense * i sense = r sense * i out /k
vn7003ah application information docid029238 rev 4 25 / 37 where : ? v sense is voltage measurable on r sense resistor ? i sense is curren t provided from cs pin in current output mode ? i out is current flowing through output ? k factor represents the ratio between powermos cells and sensemos cells; its spread includes geometric factor spread, current sense amplifier offset and process parameters spread of overall circuitry specifying ratio between i out and i sense . failure flag indication in case of power limitation/overtemperature, the fault is indicated by the cs pin which is switched to a current limited voltage source, v senseh . i n any case, the current sourced by the cs in this condition is limited to i senseh figure 32 : analogue hsd C open - load detection in off - state
application information vn7003ah 26 / 37 docid029238 rev 4 figure 33 : open - load / short to vcc condition table 14: curr entsense pin levels in off - state condition output currentsense sen open - load v out > v ol hi - z l v senseh h v out < v ol hi - z l 0 h short to v cc v out > v ol hi - z l v senseh h nominal v out < v ol hi - z l 0 h 4.4.2 short to vcc and off - state open - load detection short to v cc a short circuit between v cc and output is indicated by the relevant current sense pin set to v senseh during the device off - state. small or no current is delivered by the current sense during the on - state depending on the nature of the short circuit. off - state open - load with external circuitry detection of an open - load in off mode requires an external pul l - up resistor r pu connecting the output to a positive supply voltage v pu .
vn7003ah application infor mation docid029238 rev 4 27 / 37 it is preferable v pu to be switched off during the module standby mode in order to avoid the overall standby current consumption to increase in normal conditions, i.e. when load is c onnected. r pu must be selected in order to ensure v out > v olmax in accordance with the following equation: equation
maximum demagnetization energy (vcc = 16 v) vn7003ah 28 / 37 docid029238 rev 4 5 maximum demagnetization energy (vcc = 16 v) figure 34 : maximum turn off current versus inductance
vn7003ah package and pcb thermal data docid029238 rev 4 29 / 37 6 package and pcb thermal data 6.1 octapak thermal data figure 35 : octapak on two - layers pcb (2s0p to jedec jesd 51 - 5) figure 36 : octapak on four - layers pcb (2s2p to jedec jesd 51 - 7) table 15: pcb properties dimension v alue board finish thickness 1.6 mm +/ - 10% board dimension 77 mm x 86 mm board material fr4 copper thickness (top and bottom layers) 0.070 mm copper thickness (inner layers) 0.035 mm thermal vias separation 1.2 mm thermal via diameter 0.3 mm +/ - 0.08 mm copper thickness on vias 0.025 mm footprint dimension (top layer) 6.4 mm x 7mm heatsink copper area dimension (bottom layer) footprint, 2 cm 2 or 8 cm 2
package and pcb thermal data vn7003ah 30 / 37 docid029238 rev 4 figure 37 : rthj - amb vs pcb copper area in open box free air conditi ons figure 38 : octapak thermal impedance junction ambient single pulse equation: pulse calculation formula z th = r th + z thtp (1 - ) where = t p /t
vn7003ah package and pcb thermal data docid029238 rev 4 31 / 37 figure 39 : thermal fitting model for octapak the fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. table 16: thermal parameters area/island (cm2) footprint 2 8 4l r1 (c/w) 0.01 0.01 0.01 0.01 r2 (c/w) 0.5 0.5 0.5 0.5 r3 (c/w) 1.6 1.6 1.6 1.6 r4 (c/w) 10 10 10 2.5 r5 (c/w) 28 20 12 5 r6 (c/w) 36 26 18 6 c1 (w.s/c) 0.001 0.001 0.001 0.001 c2 (w.s/c) 0.0018 0.0018 0.0018 0.0018 c3 (w.s/c) 0.11 0.11 0.11 0.11 c4 (w.s/c) 0.6 0.6 0.6 0.8 c5 (w.s/c) 0.8 1.4 2.2 3 c6 (w.s/c) 3 6 9 25
package information vn7003ah 32 / 37 docid029238 rev 4 7 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 7.1 octapak package information figure 40 : octapak package dimensions table 17: octapak mechanical data symbol millimeters min. typ. max. a 2.20 2.30 2.40 a1 0.90 1.00 1.10 a2 0.03 0.15 b 0.38 0.45 0.52
vn7003ah package information docid029238 rev 4 33 / 37 symbol millimeters min. typ. max. b1 0.70 b4 5.20 5.30 5.40 c 0.45 0.50 0.60 c2 0.75 0.80 0.90 d 6.00 6.10 6.20 d1 5.15 e 6.40 6.50 6.60 e1 5.30 e 0.85 bsc e1 1.60 1.70 1.80 e2 3.30 3.40 3.50 e3 5.00 5.10 5.20 h 9.35 9.70 10.10 l 1.00 (l1) 2.80 l2 0.80 l3 0.85 r 0.40 bsc v2 0 8 7.2 octapak packing information figure 41 : octapack reel 13"
package information vn7003ah 34 / 37 docid029238 rev 4 table 18: reel dimensions description value (1) base quantity 2500 bulk quantity 2500 a (max) 330 b (min) 1.5 c (+0.5, - 0.2) 13 d 20.2 n 100 w1 (+2 / - 0) 16.4 w2 (max) 22.4 notes: (1) all dimensions are in mm. figure 42 : octapak carrier tape
vn7003ah package information docid029238 rev 4 35 / 37 figure 4 3 : octapak schematic drawing of leader and trailer tape 7.3 octapak marking information figure 44 : octapak marking information parts marked as "&" are not yet qualified and therefore not yet ready to be used in production and any consequences deriving from such usage will not be at st charge. in no event, st will be liable for any customer usage of these engineering samples in production. st quality has to be contacted prior to any decision to use these engineering samples to run qualification activity.
revision history vn7003ah 36 / 37 docid029238 rev 4 8 revision history table 19: document revision history date revision changes 15 - apr - 2016 1 initial release 02 - aug - 2016 2 doc status upgraded to production data section "features" ? added aec - q100 qualification ? i limh : updated current limitation feature figure 1: "block diagram" ? updated figure table 4: "absolute maximum ratings" ? e max : updated value and the t demag table 5: "thermal data" ? r thj - board changed to r thj - case ? all typ. values updated table 8: "switching" ? updated min., typ. and max. columns table 10: "protection" ? i limh : updated typ. and max. values ? i liml : updated typ. value ? t j_sd : removed temperature condition table 11: "currentsense" ? k ol : added typ. value ? v sense_sat , i sense_sat and i out_sat : updated test conditions ? currentsense timings (current sense mode): updated test condition r l ? t dsense2h : updated max. value added figure 4: "iout/isense versus iout" added figure 5: "current sense precis ion vs. iout" added section 2.4: "electrical characteristics curves" added figure 34: "maximum turn off current versus inductance" updated section 7.1: "octapak package information" 03 - aug - 2016 3 restored figure 28: "application diagram" and figure 32: "analogue hsd C open - load detection in off - state" , inadvertently altered in document revision 2. 02 - nov - 2016 4 updated applications section
vn7003ah docid029238 rev 4 37 / 37 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics C all rights reserved

▲Up To Search▲

Price & Availability of VN7003AHTR

	To Download VN7003AHTR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .